Purchase a Tiny Tapeout token today and embark on your journey of electronic innovation.
TinyTapeout is a simplified way to get your digital designs onto silicon. If you have Verilog ready to go, you can submit it for manufacture in a few hours.
By splitting a single chipIgnite slot into 100 smaller projects, we can lower the cost of entry to $300 for one chip mounted onto an evaluation board (excluding taxes).
Larger designs can be accommodated by buying extra tiles for $50. Each tile is about 160 x 100um and provides enough space for around 1000 standard cells.
Designs get clock, reset and 24 IOs operating at up to 50MHz. Find out more about the specifications here.
Purchasing from Efabless provides a digital token via email which can be used at the TinyTapeout site for submitting and fabricating your design.
The price includes:
Free access to design tools for implementing your project
One (1) tile providing 160x100um of area and up to 1000 standard cells
Fabrication and packaging of your design in the TinyTapeout chip
One (1) ASIC carrier board with the fabricated TinyTapeout chip which also includes all designs submitted for the chip
One (1) demo board that accepts an ASIC carrier board
A digital copy of the datasheet describing each of the projects implemented on the chip and instructions on how to test them
Check the TinyTapeout site for fabrication schedules and submission deadlines.
Tiny Tapeout is a project from Matt Venn and Uri Shaked and sponsored by Efabless.
